1. Field of the Invention
The present invention generally relates to electrostatic discharge protection for semiconductor integrated circuitry. More particularly , the present invention relates to an improved diode structure compatible with silicide processes for electrostatic discharge protection.
2. Description of the Related Art
In sub-micron MOS-based technology, electrostatic discharge, ESD hereinafter, becomes a reliability concern. As shown in FIG. 1, a part of diodes D1 and D2 are provided at the pad 1 of a conventional integrated circuit. When ESD occurs at the pad 1, the diode D1 or D2 enters breakdown to bypass the ESD stress so as to protect the internal circuit 2 from ESD damage.
Referring to FIG. 2, the diode D1 or D2 of FIG. 1 disposed on semiconductor substrate 20 is illustrated in a cross-sectional view. In FIG. 2, an insulator 21, such as field oxide grown by means of local oxidation, are provided on the P-type semiconductor substrate 20. An N-type diffusion region 22 is formed in the semiconductor substrate 20 and encircled by the insulator 21. Therefore, diodes D1 or D2 are constituted by the P/N junction between the N-type diffusion region 22 and the P-type substrate 20. In addition, a silicide layer 23 can be formed over the N-type diffusion region 22 by a so-called self-aligned silicidation (salicide) process to reduce the contact sheet resistance.
However, under high current stressing conditions the ballastic resistance is dramatically reduced. Hence, once the hot spot is initiated at the diffusion edge 24, there is very little resistance to prevent current localization through the hot spot. Therefore, when the temperature at the silicide reaches up to 1000.degree. C., the silicide can begin to decompose or interact with the silicon, or both, and cause damage to the diode D1 or D2.